INTC Primer: No Equity Dilution Necessary (Part 1)
Some chips can be manufactured for Uncle Sam at TSMC. For everything else, there's Intel.
FREE-TO-READ:
1. Only Leading-Edge Foundry in the West
2. Equity Raise Unnecessary
3. Headcount Decapitation & Dividend We Fall
4. Review of Q2 results: Not-so-Sad
5. Intel: Not A Loser, Just Less Paranoid (than AMD or TSMC)
6. This Is What Volatility Looks Like, and Why Value Investors Win
PAID SUBSCRIBERS ONLY:
7. Uncovering Intel’s Sources of Recent Underperformance - via Financial Statement Deep-Dive
8. 🔒
9. 🔒
10. 📊 INTC 3-Statement Model (download)
“Coupled with Intel’s organic FCF being in persistently positive territory, these Partner Contributions also demonstrate how Intel will never need to perform an equity raise — they can simply look for more partners to fund further IFS buildout at the joint venture level. I mean, technically it’s an equity raise, but you know what I mean.”
INTC needs no introduction — you either love it or hate it, there’s no middle ground. Let’s cut straight to the chase.
The 1st half of this article is available for all to read, and will basically expound on all the reasons why INTC shouldn’t be written off for dead yet. The 2nd half of this article is reserved only for paid subscribers, and does a deep-dive into their financial statements of the past few years to uncover their recent sources of underperformance. We’ll continue this exercise in next week’s Part 2.
Sophisticated semiconductor industry analysts will appreciate being able to separate the wheat from the chaff with these articles, by directing their energies towards analyzing only the parts of INTC’s financial statements which matter. If you identify as one, you’ll know what I mean — the semiconductor industry is a byzantine minefield of rabbit holes to navigate, and reducing the scope of your analysis by 90% can help you save tons of research time, just by knowing exactly where to look (and where not to).
Only Leading-Edge Foundry in the West
As I’ve previously explained in my Intel Part 3 article, the Western hemisphere has only one leading-edge foundry that it can rely on, Intel. TSMC and Samsung may currently lead Intel in process nodes, but their geographical proximity to America’s biggest rival makes them unreliable for chip manufacturing in sensitive sectors (e.g. military purposes).
As I’ve covered previously in my Intel Part 2 article, Intel is admittedly slightly behind in process nodes across the board when compared to TSMC and Samsung. However, this is something that it can eventually catch up to over the medium-term; in contrast, it would take far longer for TSMC to replicate its leading-edge manufacturing capacity on US shores.
A recent article by Tom’s Hardware suggests that even if they could, it would take far more than that to replicate its cost structure in Taiwan on US soil. What is considered acceptable working conditions there has faced severe pushback by employees in the US — such conditions would likely be exacerbated in Europe:
One big problem is that TSMC has been trying to do things the Taiwanese way, even in the U.S. In Taiwan, TSMC is known for extremely rigorous working conditions, including 12-hour work days that extend into the weekends and calling employees into work in the middle of the night for emergencies. TSMC managers in Taiwan are also known to use harsh treatment and threaten workers with being fired for relatively minor failures.
TSMC quickly learned that such practices won’t work in the U.S. Recent reports indicated that the company’s labor force in Arizona is leaving the new plant over these perceived abuses, and TSMC is struggling to fill those vacancies. TSMC is already heavily dependent on employees brought over from Taiwan, with almost half of its current 2,200 employees in Phoenix coming over as Taiwanese transplants.
This means that while TSMC might have the edge over Intel in the short-term, over the long-term Intel will gradually become more competitive simply by virtue of its geographical location. Even on process alone, Intel appears to already be leading in backside power delivery1, where they purportedly have a roughly one year’s headstart over both TSMC and Samsung.
The DOD has already contracted Intel Foundry for their chip manufacturing, and it seems unlikely that they won’t shift most of their orders from TSMC in Taiwan to Intel over the long-term. Also, imagine if you are Apple or even AMD. Wouldn’t it make sense to move just some of your orders to the US, purely for risk management purposes? That means Intel IFS, which would have the edge over TSMC on US shores.
As I’ve previously covered in my INTC Part 3 article, the main draw of a mature IFS is to replicate TSMC’s business model — for every $1 of CAPEX invested, a reliable $1 of Net Profit can be generated like clockwork, given the lack of available alternatives. Obviously this may change going forward, but even half of that performance would be more than satisfactory.
For context, the chart above shows how TSMC’s revenues are currently $70B, with average historical NM of 35-40%. If Intel IFS can achieve even half those revenues with similar normalized NM of 35%, that would add an incremental $12B to their bottom-line over the long-term. For reference, Intel’s highest-ever full-year earnings were only $21B in FY18 and FY19 respectively — adding even $10B to that would immediately restore their long-term earnings track record.
Equity Raise Unnecessary
A lot of the recent scare over INTC comes from the notion that they might be forced to do an equity raise in the near-future. The natural interpretation of this, following the massive 15% cut of its 124,000 strong headcount and the suspension of its dividend, is that INTC might be facing a cash crunch owing to deteriorating operating conditions which might necessitate an equity raise.
The reality is a bit more nuanced. INTC is currently on a warpath towards completing the buildout of Intel Foundry Systems (IFS) as a national strategic concern — with both Uncle Sam and Queen Europa breathing down its neck to replicate TSMC’s manufacturing capacity on US shores by yesterday. As one can imagine, such artificially imposed governmental constraints would understandably wreck their near-term performance, independently of actual business cycle concerns.
Having said that, this is not the same as BANKRUPTCY. Keep in mind that there aren’t any business or financial pressures forcing Intel into insolvency here. As we shall see later, their OCF is still in significantly positive territory, albeit half of what they used to be. THERE IS NO GOING CONCERN RISK.
In the absolute worst-case scenario where Intel is unable to keep up with the buildout of IFS, they can simply tell both governments that it has no choice but to delay IFS completion in order to reduce cash burn. It serves nobody’s interest to see Intel go bankrupt — if anything, both governments would bail them out before entertaining such a thought. Simply pushing out IFS completion by a few years would immediately restore Intel’s cash flow & balance sheet trajectory to solvent levels, thus avoiding any potential going concern risk.
This also implies that there is no conceivable scenario where Intel resorts to issuing equity and significantly dilutes shareholders due to going concern risk. The military industrial complex will make sure of that.
Headcount Decapitation & Dividend We Fall
Firstly, I must acknowledge that this is a highly sensitive issue and that the loss of jobs is never something to be taken lightly. My heart goes out to everyone involved.
Having said that, I think many industry observers can agree that this was the right decision for Intel. Something that caught my attention was Noahpinion’s recent take on the issue, which suggests that Intel has yet to see a dime of the CHIPS Acts subsidies — if you recall, these were announced just 5 months ago in the form of an $8.5B non-binding preliminary memorandum of terms (PMT). With the US elections just over the horizon and a possibly hostile President coming in, it makes ample sense to extend cash flow risk headroom in light of their massive remaining commitments to fund the buildout of IFS.
Perhaps Gelsinger & Co. are aware of ongoing developments in the halls of Washington that mere mortals like us are not privy to. But if those CHIPS Acts subsidies are not forthcoming, then Intel might be staring at the prospect of having to fund the IFS CAPEX black hole completely by itself.
The silver lining here is that the aforementioned missing subsidies amount to “just” $8.5B — small potatoes in the grand scheme of things. For context, Intel’s annual FCF throughout FY17-21 regularly hovered around $20B, prior to the recent industry downturn. Cutting both headcount and dividends will go a long way towards shoring up their cash flows — and with a possible recession looming on the horizon, such news would be better announced sooner rather than later.
Review of Q2 results: Not-so-Sad
As I’ve covered in a previous note, Intel’s dumpster fire Q2 miss was actually… not as bad as it seems. The charts below show how the biggest factor by far behind their Q2 earnings miss was in fact GP decline, rather than OPEX increase. While higher depreciation owing to larger Foundry investments might have been the likely first culprit to come to mind, the actual reason behind the GP decline was due to sharply dropping Gross Margins in Q2 (green line):
We now know that the reason for this was due to a very deliberate management decision to ramp-up manufacturing in “AI-PC”, rather than poor execution. To get more technical, earlier anticipated greater demand for Meteor Lake chips based on Intel 4 (7nm) had spurred a management decision to move some manufacturing capacity from their legacy development fabs in Oregon to their high-volume Fab 34 facility in Ireland, which is expected to result in $1B in capital savings over the long-term2.
However, this decision resulted in lower margins in Q2, as the Ireland fab has yet to fully scale. This is actually a good problem to have, as it implies that there was too much Meteor Lake demand for Intel to service at its usual fabs. It had also been announced in advance, rather than simply being unchecked poor execution.
Initially, Intel analyst Patrick Moorhead suggested there could’ve been yield issues on Meteor Lake production, which might’ve necessitated running hot lots3 persistently to meet demand that could have impacted Q2 margins. However, he later retracted his statement, saying that the yield issues were merely his interpretation.
A quick scuttlebutt revealed this excellent Reddit comment, which explains how Intel’s Q2 gross margins weren’t actually impacted by chip yield/throughput issues. Rather, the manufacturing bottleneck was actually in advanced packaging, specifically Foveros4, which is only manufactured at their Fab 9 plant in New Mexico. This was a production issue which had been announced 3 whole months ago during their Q1 earnings call, so it’s not like markets couldn’t have seen it coming.
The interpretation of this is that Q2’s margin deterioration was merely a short-term issue owing to an assembly line bottleneck in advanced packaging; rather than some sort of structural defect in manufacturing process of its new Meteor Lake chips (e.g. “EUV problems”). The latter would put Intel’s manufacturing processes structurally behind TSMC, while the former should easily be solved by this time next year.
Intel: Not A Loser, Just Less Paranoid (than AMD or TSMC)
The bigger drop in sentiment came from concerns about Intel’s longer-term trajectory, rather than simply the Q2 miss. A big part of it was simply Intel’s legacy narrative returning back to haunt them — they’ve failed before, now look at them fail again.
While it should be acknowledged that Intel is indeed facing issues today, this narrative is beyond incorrect, as their current “failures” are completely detached from their previous “failures” from before Gelsinger joined as CEO. In fact, they aren’t even really “failures”, as I shall explain below.
As most Intel observers know by now, Intel had faced some serious efficiency issues in the half-decade before Pat Gelsinger joined as CEO — including running hot lots all the time to meet KPIs and a terri-bad company culture which trounced operational performance. It also missed two cycles of sector innovations to competitors — chiplets on the design side to AMD, and EUV on the manufacturing side to TSMC.
Sector analysts will know that both of these missteps didn’t result from hubris — rather they were simply logical decisions made as a matter of risk management, given what could’ve possibly been known at the time. Prior to Lisa Su’s tenure, AMD’s decision to pursue chiplets was considered risky, as it required:
a sea change in the conceptual understanding of chip manufacturing,
the reliable implementation of interconnects on massive scale (which had never been done before),
overcoming doubts on whether chiplet performance would even beat single die performance after lower interconnect efficiencies, and
whether product market fit would even exist at scale for the completely new chiplet technology.
The same thing can be said about why Intel missed EUV to TSMC. Anyone who understands lithography tech will understand why Intel decided to persist with multi-patterning while TSMC switched to EUV. According to chip sector folklore, ASML’s engineers basically had a huge stroke of luck in solving an issue which had previously plagued EUV tech — achieving a stable 100 watt of EUV output. ASML’s CTO recounts a story where they had butted right up against a January 2018 deadline to find a solution to this, without which they would’ve called off the industrialization of EUV:
That time window was relevant, because that was the deadline for customers to place orders for High-NA machines. If they didn’t, we’d stop the program.
This incredibly timely discovery allowed ASML to push EUV through according to deadlines, which subsequently allowed TSMC to firmly leapfrog Intel in the foundry business. As you can imagine, this involved tons of uncertainty which could’ve straight up put TSMC out of business, or at least hurt them. But they took the risk, and fortune favors the bold.
As you can also imagine, 90% of MBA suits and McKinsey consultants at the time would not have recommended Intel to pursue either chiplets or EUV — the risks involved were simply immeasurable. AMD’s pursuit of chiplets and TSMC’s switch to EUV were both bet-the-farm decisions — if anything went wrong, that could have been the end for them. A good example of what both of their fates might’ve looked like had the winds blown the wrong way was sapphire glass manufacturer GTAT, which infamously blew up in 2014 following an alleged “bait-and-switch” tactic by Apple. Understandably, Intel might not have wanted to entertain such ungodly levels of risk at the time.
While many words can be spilled over Andy Grove’s precocious quote, “Only The Paranoid Survive”, I wouldn’t be so hasty to crucify Intel over their decision not to bet the farm on entirely non-existent tech the way both AMD and TSMC did, in both of their respective leapfrogging endeavors. On Earth-56, both of them might have gone completely bankrupt. In any case, it sounds like Intel is already wising up to incremental risk-taking, as evidenced by their recent share price trajectory.
This Is What Volatility Looks Like, and Why Value Investors Win
Intel’s recent share price crash is actually a great template for what Buffett & Munger mean by focusing on short-term volatility vs. having a long-term business view. Most readers can probably agree with the points I made above, and that Intel will eventually become the only leading-edge foundry in the Western Hemisphere within any reasonable amount of time.
If so, and we can agree that going concern risk is not present, then Intel’s current share price volatility is also a great example of why most investors aren’t long-term investors. When the entire world is going against you, it’s unassailably hard to swim against the tide without true conviction — even if you believe that your facts are correct. Thus, being a long-term value investor takes real analytical experience to develop such conviction and cover all possible angles, even amidst debilitating levels of volatility.
Now that we’ve established how INTC isn’t about to face bankruptcy anytime soon, what else might be in store for its future? Perhaps more importantly, what does their worst-case valuation look like? That’s what we’ll be exploring in this two-part INTC report for paid subscribers — check out our previous Intel articles below too!
Uncovering Intel’s Sources of Recent Underperformance — via Financial Statement Deep-Dive
In the remainder of this report, we’ll be doing a deep-dive into INTC’s financial statements, updated to Q2. By doing so, we can zoom in on the parts of their financial statements which are underperforming, thus allowing us to narrow down the scope of our analysis to just the needle-movers.
Sophisticated semiconductor industry analysts will also appreciate being able to separate the wheat from the chaff with these articles, by directing their energies towards analyzing only the parts of INTC’s financial statements which matter. If you identify as one, you’ll know what I mean — the semiconductor industry is a byzantine minefield of rabbit holes to navigate, and reducing the scope of your analysis by 90% can help you save tons of research time, just by knowing exactly where to look (and where not to).
Without further ado, let’s take a hard look at Intel’s biggest source of recent underperformance…
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